This has been done to maintain the backwards compatibility with our CI/CD: in the previous version of Clea OS (based on Kirkston), the recipes of U-Boot and kernel had the name u-boot-seco-rk and linux-seco-rk, respectively, and our CI/CD uses these names for the integration layer task.

Now it is possibile to use -rk as override for both U-Boot and kernel (see the SRCREV.conf file).

Also the PROVIDES list has been updated for the same reason. In this way old mechanisms can refers to those recipes in the same way as in the past.

Note: in the future, the new material will refer to them without the -rk suffix (only with the new name).

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@94fa1d5c

[YCONFIG] Add YConfig entries for RK

Added the machines for the supported Rockchip boards on Scarthgap following the syntax of the new build configurator.

Signed-off-by: Nicola Sparnacci nicola.sparnacci@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@3ce00963

[SRCREV] Add SRCREV.conf

Signed-off-by: Nicola Sparnacci nicola.sparnacci@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@cf67f3b4

[BBLAYERS] Use layer relative path referred to ${BSPDIR}

Signed-off-by: Nicola Sparnacci nicola.sparnacci@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@c5df860f

[KERNEL] Fix URL of Linux kernel source repository

Fixed type: the old URL (with 'edgehog' instead 'clea-os') remained.

Commit: clea-os/layers/seco/meta-seco-rk@c5985818

[WIC][CLASS] Update separator used in WKS_MACHINE_BOOT_PARTITION_LAYOUT

Reference commit: clea-os/layers/seco/meta-seco-bsp@2e97d430 Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@a0479f6a

[WIC][CLASS] Update separator used in WKS_MACHINE_BOOT_PARTITION_LAYOUT

Reference commit:

clea-os/layers/seco/meta-seco-bsp@2e97d430

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@42e26965

MACHINE][E09] Add basic support for E09 SBC

This board is based on RK3568 SOC.

Log of a boot of core-image-minimal image:

DDR V1.16 6f71c736ce typ 23/03/02-20:01:48 In LP4/4x derate en, other dram:2x trefi ddrconfig:0 LP4 MR14:0x4d LPDDR4, 324MHz BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB tdqss: cs0 dqs0: 48ps, dqs1: -72ps, dqs2: -24ps, dqs3: -120ps,

change to: 324MHz PHY drv:clk:38,ca:38,DQ:30,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x61

change to: 528MHz PHY drv:clk:38,ca:38,DQ:30,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x58

change to: 780MHz PHY drv:clk:38,ca:38,DQ:30,odt:0 vrefinner:41%, vrefout:41% dram drv:40,odt:0 clk skew:0x58

change to: 1560MHz(final freq) PHY drv:clk:38,ca:38,DQ:30,odt:60 vrefinner:16%, vrefout:29% dram drv:40,odt:80 vref_ca:00000068 clk skew:0x21 cs 0: the read training result: DQS0:0x2e, DQS1:0x30, DQS2:0x30, DQS3:0x35, min : 0x6 0x5 0x7 0x3 0x2 0x5 0x5 0x4 , 0x6 0x2 0x6 0x6 0x6 0x6 0x6 0x6 , 0x4 0x5 0x7 0x3 0x2 0x5 0x4 0x3 , 0xa 0x6 0x6 0x1 0xe 0xc 0xc 0xa , mid :0x21 0x1f 0x20 0x1d 0x1d 0x1f 0x20 0x1f ,0x1f 0x1c 0x1f 0x1e 0x1e 0x1f 0x1e 0x1e , 0x1f 0x20 0x21 0x1f 0x1c 0x20 0x1f 0x1f ,0x25 0x21 0x20 0x1b 0x26 0x26 0x27 0x23 , max :0x3c 0x39 0x39 0x38 0x38 0x3a 0x3c 0x3a ,0x38 0x36 0x39 0x36 0x37 0x38 0x37 0x37 , 0x3a 0x3b 0x3c 0x3c 0x36 0x3b 0x3b 0x3b ,0x41 0x3c 0x3b 0x35 0x3f 0x41 0x42 0x3d , range:0x36 0x34 0x32 0x35 0x36 0x35 0x37 0x36 ,0x32 0x34 0x33 0x30 0x31 0x32 0x31 0x31 , 0x36 0x36 0x35 0x39 0x34 0x36 0x37 0x38 ,0x37 0x36 0x35 0x34 0x31 0x35 0x36 0x33 , the write training result: DQS0:0x2a, DQS1:0x13, DQS2:0x1d, DQS3:0xa, min :0x6a 0x6b 0x6c 0x6a 0x67 0x68 0x69 0x6b 0x6a ,0x4c 0x4d 0x4d 0x4e 0x4f 0x4e 0x4d 0x4e 0x49 , 0x58 0x5a 0x5a 0x5a 0x56 0x58 0x58 0x5b 0x59 ,0x44 0x44 0x42 0x3d 0x49 0x48 0x47 0x49 0x48 , mid :0x86 0x87 0x87 0x85 0x80 0x82 0x84 0x85 0x85 ,0x68 0x69 0x69 0x69 0x6a 0x69 0x69 0x69 0x65 , 0x75 0x77 0x76 0x76 0x71 0x75 0x74 0x76 0x75 ,0x61 0x5f 0x5e 0x59 0x63 0x64 0x63 0x64 0x64 , max :0xa3 0xa3 0xa3 0xa0 0x9a 0x9c 0xa0 0xa0 0xa1 ,0x85 0x85 0x85 0x85 0x85 0x85 0x85 0x84 0x82 , 0x93 0x94 0x93 0x93 0x8d 0x92 0x91 0x92 0x92 ,0x7f 0x7b 0x7a 0x76 0x7e 0x81 0x80 0x80 0x80 , range:0x39 0x38 0x37 0x36 0x33 0x34 0x37 0x35 0x37 ,0x39 0x38 0x38 0x37 0x36 0x37 0x38 0x36 0x39 , 0x3b 0x3a 0x39 0x39 0x37 0x3a 0x39 0x37 0x39 ,0x3b 0x37 0x38 0x39 0x35 0x39 0x39 0x37 0x38 , CA Training result: cs:0 min :0x4d 0x45 0x4c 0x3c 0x46 0x38 0x45 ,0x4c 0x41 0x4a 0x3d 0x47 0x3b 0x48 , cs:0 mid :0x86 0x86 0x84 0x7e 0x7d 0x7a 0x6e ,0x83 0x82 0x82 0x7f 0x7e 0x7c 0x71 , cs:0 max :0xbf 0xc7 0xbc 0xc0 0xb4 0xbc 0x98 ,0xbb 0xc3 0xba 0xc1 0xb6 0xbe 0x9b , cs:0 range:0x72 0x82 0x70 0x84 0x6e 0x84 0x53 ,0x6f 0x82 0x70 0x84 0x6f 0x83 0x53 , out U-Boot SPL board init U-Boot SPL 2017.09-gaaca6ffec1-211203 #zzz (Dec 03 2021 - 18:42:16) unknown raw ID phN unrecognized JEDEC id bytes: 00, 00, 00 Trying to boot from MMC2 No misc partition Trying fit image at 0x4000 sector Jumping to U-Boot(0x00a00000) via ARM Trusted Firmware(0x00040000) Total: 328.998 ms

INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-578-gaef7950e4:huan.he NOTICE: BL31: Built : 14:05:25, Apr 19 2023 INFO: GICv3 without legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: pmu v1 is valid 220114 INFO: dfs DDR fsp_param[0].freq_mhz= 1560MHz INFO: dfs DDR fsp_param[1].freq_mhz= 324MHz INFO: dfs DDR fsp_param[2].freq_mhz= 528MHz INFO: dfs DDR fsp_param[3].freq_mhz= 780MHz INFO: BL31: Initialising Exception Handling Framework INFO: BL31: Initializing runtime services INFO: BL31: Initializing BL32 I/TC: I/TC: OP-TEE version: 3.13.0-651-gd84087907 #hisping.lin (gcc version 10.2.1 20201103 (GNU Toolchai n for the A-profile Architecture 10.2-2020.11 (arm-10.16))) #5 Fri Sep 16 15:39:33 CST 2022 aarch64 I/TC: Primary CPU initializing I/TC: Primary CPU switching to normal world boot INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0xa00000 INFO: SPSR = 0x3c9

U-Boot 2017.09 (Sep 02 2024 - 11:58:49 +0000)

Model: Rockchip RK3568 SECO Board (E09) PreSerial: 2, raw, 0xfe660000 DRAM: 2 GiB Sysmem: init Relocation Offset: 7d377000 Relocation fdt: 7b9e5548 - 7b9fec68 CR: M/C/I I2c0 speed: 100000Hz PMIC: RK8090 (on=0x40, off=0x00) vdd_logic init 900000 uV vdd_gpu init 900000 uV vdd_npu init 900000 uV io-domain: OK Failed to get scmi clk dev dmc_fsp failed, ret=-19 MMC: dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0 *** Warning - bad CRC, using default environment

Model: Rockchip RK3568 SECO Board (E09) switch to partitions #0, OK mmc1 is current device I2c3 speed: 100000Hz Seco Eeprom Manager - version not compatible or eeprom not formatted Version = 255.255

failed to get eeprom macaddress rockchip_set_serialno: could not find efuse/otp device Bootdev(atags): mmc 1 MMC1: Legacy, 52Mhz PartType: EFI No misc partition boot mode: None CLK: (sync kernel. arm: enter 816000 KHz, init 816000 KHz, kernel 0N/A) apll 816000 KHz dpll 780000 KHz gpll 1188000 KHz cpll 1000000 KHz npll 1200000 KHz vpll 24000 KHz hpll 24000 KHz ppll 200000 KHz armclk 816000 KHz aclk_bus 150000 KHz pclk_bus 100000 KHz aclk_top_high 300000 KHz aclk_top_low 200000 KHz hclk_top 150000 KHz pclk_top 100000 KHz aclk_perimid 300000 KHz hclk_perimid 150000 KHz pclk_pmu 100000 KHz No misc partition Net: Warning: ethernet@fe2a0000 (eth0) using random MAC address - 0a:c7:f4:96:e4:f9

Warning: ethernet@fe010000 (eth1) using random MAC address - d2:64:5e:d5:6b:4f eth1: ethernet@fe010000, eth0: ethernet@fe2a0000 Start boot... Hit key to stop autoboot('CTRL+C'): 0 switch to partitions #0, OK mmc1 is current device ** File not found seco_boot.scr ** ==> Running in Normal Mode... switch to partitions #0, OK mmc1 is current device 35676672 bytes read in 2833 ms (12 MiB/s) 171446 bytes read in 19 ms (8.6 MiB/s) Ramdisk skip relocation No misc partition Booting using the fdt blob at 0x08300000 reserving fdt memory region: addr=8300000 size=ea000 'reserved-memory' ramoops@110000: addr=110000 size=f0000 Loading Device Tree to 000000007b8f6000, end 000000007b9e2fff ... OK Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000) Adding bank: 0x09400000 - 0x80000000 (size: 0x76c00000) Total: 3811.205 ms

Starting kernel ...

[ 3.961307] Booting Linux on physical CPU 0x0000000000 [0x412fd050] [ 3.961336] Linux version 5.10.110 (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 13.3.0, GNU l d (GNU Binutils) 2.42.0.20240216) #1 SMP Wed Sep 4 13:53:08 UTC 2024 [ 3.971471] Machine model: Rockchip RK3568 SECO Board (E09) ...

SECO Clea OS Distro 5.0.2 seco-rk3568-e09 /dev/ttyFIQ0

seco-rk3568-e09 login:

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@cc10b6c5

MACHINE][C31] Add basic support for C31 SBC

This board is based on Rk3399 SOC.

Log of a boot of core-image-minimal image:

DDR Version 1.30 20230417 In channel 0 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 1 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 0 training pass! channel 1 training pass! change freq to 416MHz 0,1 Channel 0: LPDDR4,416MHz Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB Channel 1: LPDDR4,416MHz Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB 256B stride channel 0 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 1 CS = 0 MR0=0x98 MR4=0x1 MR5=0xFF MR8=0x8 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0x0 channel 0 training pass! channel 1 training pass! channel 0, cs 0, advanced training done channel 1, cs 0, advanced training done change freq to 856MHz 1,0 ch 0 ddrconfig = 0x101, ddrsize = 0x20 ch 1 ddrconfig = 0x101, ddrsize = 0x20 pmugrf_os_reg[2] = 0x3281F281, stride = 0x9 ddr_set_rate to 328MHZ ddr_set_rate to 666MHZ ddr_set_rate to 928MHZ channel 0, cs 0, advanced training done channel 1, cs 0, advanced training done ddr_set_rate to 416MHZ, ctl_index 0 ddr_set_rate to 856MHZ, ctl_index 1 support 416 856 328 666 928 MHz, current 856MHz OUT Boot1 Release Time: May 29 2020 17:36:36, version: 1.26 CPUId = 0x0 ChipType = 0x10, 640 SdmmcInit=2 0 BootCapSize=100000 UserCapSize=15028MB FwPartOffset=2000 , 100000 mmc0:cmd5,20 SdmmcInit=0 0 BootCapSize=0 UserCapSize=14910MB FwPartOffset=2000 , 0 StorageInit ok = 72865 SecureMode = 0 SecureInit read PBA: 0x4 SecureInit read PBA: 0x404 SecureInit read PBA: 0x804 SecureInit read PBA: 0xc04 SecureInit read PBA: 0x1004 SecureInit read PBA: 0x1404 SecureInit read PBA: 0x1804 SecureInit read PBA: 0x1c04 SecureInit ret = 0, SecureMode = 0 atags_set_bootdev: ret:(0) GPT part: 0, name: uboot, start:0x4000, size:0x2000 GPT part: 1, name: trust, start:0x6000, size:0x2000 GPT part: 2, name: bootfs, start:0x8000, size:0x1ca5e GPT part: 3, name: rootfs, start:0x28000, size:0x10490 find part:uboot OK. first_lba:0x4000. find part:trust OK. first_lba:0x6000. Trust Addr:0x6000, 0x58334c42 No find bl30.bin Load uboot, ReadLba = 4000 Load OK, addr=0x200000, size=0x11d5c0 RunBL31 0x40000 @ 308341 us NOTICE: BL31: v1.3(release):8f40012ab NOTICE: BL31: Built : 14:20:53, Feb 16 2023 NOTICE: BL31: Rockchip release version: v1.1 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3 INFO: Using opteed sec cpu_context! INFO: boot cpu mask: 0 INFO: plat_rockchip_pmu_init(1203): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: Initializing BL32 INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-278-gef70f120a #zhangzj #9 Fri Sep 17 09:39:24 UTC 2021 aarch64)

INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2

INF [0x0] TEE-CORE:init_teecore:83: teecore inits done INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9

U-Boot 2017.09 (Sep 02 2024 - 11:58:49 +0000)

Model: Rockchip RK3399 SECO Board (C31) PreSerial: 2, raw, 0xff1a0000 DRAM: 2 GiB Sysmem: init Relocation Offset: 7db68000 Relocation fdt: 7bd50978 - 7bd5ec57 CR: M/C/I I2c0 speed: 400000Hz PMIC: RK808 vdd_center 900000 uV vdd_cpu_l 900000 uV I2c5 speed: 400000Hz PCIe link training gen1 timeout! board_pcie_device_probe PCI INTEL_I210_COPPER device not found MMC: dwmmc@fe320000: 1, sdhci@fe330000: 0 *** Warning - bad CRC, using default environment

Model: Rockchip RK3399 SECO Board (C31) I2c4 speed: 100000Hz switch to partitions #0, OK mmc1 is current device Bootdev(atags): mmc 1 MMC1: Legacy, 52Mhz PartType: EFI No misc partition boot mode: None CLK: (uboot. arml: enter 400000 KHz, init 816000 KHz, kernel 0N/A) CLK: (uboot. armb: enter 24000 KHz, init 816000 KHz, kernel 0N/A) aplll 816000 KHz apllb 816000 KHz dpll 856000 KHz cpll 24000 KHz gpll 800000 KHz npll 600000 KHz vpll 24000 KHz aclk_perihp 133333 KHz hclk_perihp 66666 KHz pclk_perihp 33333 KHz aclk_perilp0 266666 KHz hclk_perilp0 88888 KHz pclk_perilp0 44444 KHz hclk_perilp1 100000 KHz pclk_perilp1 50000 KHz No misc partition Net: eth0: ethernet@fe300000 Start boot... Hit key to stop autoboot('CTRL+C'): 0 switch to partitions #0, OK mmc1 is current device ** File not found seco_boot.scr ** ==> Running in Normal Mode... switch to partitions #0, OK mmc1 is current device 35676672 bytes read in 1475 ms (23.1 MiB/s) 99612 bytes read in 11 ms (8.6 MiB/s) Ramdisk skip relocation No misc partition Booting using the fdt blob at 0x08300000 reserving fdt memory region: addr=8300000 size=d9000 'reserved-memory' ramoops@8000000: addr=8000000 size=d0000 Loading Device Tree to 000000007bc73000, end 000000007bd4efff ... OK Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000) Adding bank: 0x0a200000 - 0x80000000 (size: 0x75e00000) Total: 8018.279 ms

Starting kernel ...

[ 8.127346] Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 8.127376] Linux version 5.10.110 (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 13.3.0, GNU l d (GNU Binutils) 2.42.0.20240216) #1 SMP Wed Sep 4 13:53:08 UTC 2024 [ 8.134238] Machine model: Rockchip RK3399 SECO Board (C31) ...

SECO Clea OS Distro 5.0.2 seco-rk3399-c31 /dev/ttyFIQ0

seco-rk3399-c31 login:

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@2eb63b0b

[MACHINE][D23] Add basic support for D23 SBC

This board is based on PX30 SOC.

Log of a boot of core-image-minimal image:

DDR V2.08 20220817 In D3,2048MB,333MHz bw col bk row cs dbw 32 10 8 15 2 16 cs1 row:15 OUT Boot1 Release Time: Jan 17 2022 10:49:08, version: 1.35 ROM VER:0x56313030, 18 chip_id:50583330_0,0 ChipType = 0x12, 3497 mmc2:cmd19,100 SdmmcInit=2 0 BootCapSize=2000 UserCapSize=15028MB FwPartOffset=2000 , 2000 SdmmcInit=0 NOT PRESENT StorageInit ok = 43718 SecureMode = 0 Secure read PBA: 0x4 Secure read PBA: 0x404 Secure read PBA: 0x804 Secure read PBA: 0xc04 Secure read PBA: 0x1004 SecureInit ret = 0, SecureMode = 0 atags_set_bootdev: ret:(0) GPT part: 0, name: uboot, start:0x4000, size:0x4000 GPT part: 1, name: trust, start:0x8000, size:0x2000 GPT part: 2, name: bootfs, start:0xc000, size:0x1c9b8 GPT part: 3, name: rootfs, start:0x2c000, size:0x10490 find part:uboot OK. first_lba:0x4000. find part:trust OK. first_lba:0x8000. LoadTrust Addr:0x8000 No find bl30.bin Load uboot, ReadLba = 4000 Load OK, addr=0x200000, size=0xface0 RunBL31 0x40000 @ 156920 us INFO: Preloader serial: 2 NOTICE: BL31: v2.3():v2.3-530-g0152b20d0:derrick.huang NOTICE: BL31: Built : 17:00:22, Feb 2 2023 NOTICE: BL31:Rockchip release version: v1.0 INFO: ARM GICv2 driver initialized INFO: Using opteed sec cpu_context! INFO: boot cpu mask: 1 INFO: plat_rockchip_pmu_init: pd status f00e INFO: BL31: Initializing runtime services INFO: BL31: Initializing BL32 I/TC: I/TC: OP-TEE version: 3.13.0-651-gd84087907 #hisping.lin (gcc version 10.2.1 20201103 (GNU Toolchai n for the A-profile Architecture 10.2-2020.11 (arm-10.16))) #6 Fri Sep 16 15:48:27 CST 2022 aarch64 I/TC: Primary CPU initializing I/TC: Primary CPU switching to normal world boot INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9

U-Boot 2017.09 (Oct 09 2024 - 09:50:07 +0000)

Model: Rockchip PX30 SECO Board (D23) PreSerial: 2, raw, 0xff160000 DRAM: 2 GiB Sysmem: init Relocation Offset: 7db87000 Relocation fdt: 7bd73068 - 7bd7dc54 CR: M/C/I I2c0 speed: 100000Hz PMIC: RK8090 (on=0x40, off=0x10) vdd_arm 1100000 uV vdd_logic 1100000 uV I2c1 speed: 400000Hz io-domain: OK MMC: dwmmc@ff370000: 1, dwmmc@ff390000: 0 *** Warning - bad CRC, using default environment

Model: Rockchip PX30 SECO Board (D23) RevC - (code 02) Bootdev(atags): mmc 0 MMC0: High Speed, 52Mhz PartType: EFI No misc partition boot mode: None CLK: (sync kernel. arm: enter 400000 KHz, init 600000 KHz, kernel 816000 KHz) apll 816000 KHz dpll 664000 KHz cpll 24000 KHz npll 1188000 KHz gpll 1200000 KHz aclk_bus 300000 KHz hclk_bus 150000 KHz pclk_bus 75000 KHz aclk_peri 300000 KHz hclk_peri 150000 KHz pclk_pmu 100000 KHz No misc partition IO Expander Setup iiii. IO EXPANDER A initialization done. [0] Bus usb@ff300000: Bus usb@ff340000: USB EHCI 1.00 Bus usb@ff350000: USB OHCI 1.0 scanning bus usb@ff300000 for devices... 1 USB Device(s) found scanning bus usb@ff340000 for devices... WARN: interface 0 has 2 endpoint descriptor, different fro m the interface descriptor's value: 1 2 USB Device(s) found scanning bus usb@ff350000 for devices... 1 USB Device(s) found Net: Warning: ethernet@ff360000 (eth0) using random MAC address - 16:9b:fd:41:d4:5c eth0: ethernet@ff360000 Start boot... Hit key to stop autoboot('CTRL+C'): 0 switch to partitions #0, OK mmc0(part 0) is current device ** File not found seco_boot.scr ** ==> Running in Normal Mode... switch to partitions #0, OK mmc0(part 0) is current device 35676672 bytes read in 1076 ms (31.6 MiB/s) 102101 bytes read in 10 ms (9.7 MiB/s) Ramdisk skip relocation No misc partition Booting using the fdt blob at 0x08300000 reserving fdt memory region: addr=8300000 size=d9000 'reserved-memory' ramoops@110000: addr=110000 size=f0000 Loading Device Tree to 000000007bc95000, end 000000007bd70fff ... OK Adding bank: 0x00200000 - 0x08400000 (size: 0x08200000) Adding bank: 0x08c00000 - 0x80000000 (size: 0x77400000) Total: 9917.147 ms

Starting kernel ...

[ 10.620901] Booting Linux on physical CPU 0x0000000000 [0x410fd042] [ 10.620940] Linux version 5.10.110 (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 13.3.0, GNU l d (GNU Binutils) 2.42.0.20240216) #1 SMP Wed Sep 4 13:53:08 UTC 2024 [ 10.629017] Machine model: Rockchip PX30 SECO board (D23) ...

SECO Clea OS Distro 5.0.2 seco-px30-d23 /dev/ttyFIQ0

seco-px30-d23 login:

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@ed4ff08f

[BSP][U-BOOT] Add support for U-Boot 2017.09

This recipes is compatible with basic U-Boot support of meta-seco-bsp. The recipe is a result of a refactoring of U-Boot part presents in

https://git.seco.com/clea-os/layers/seco/meta-seco-rk/-/tree/kirkstone/recipes-bsp/u-boot

In the old version, a U-Boot recipe is present of each SOCs. The refactoring allowed to obtain a unique recipe compatible with all RK SOCs.

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@2b406c43

[KERNEL][ADD] Add support for Linux kernel 5.10.110

Basic Linux kernel 5.10.110 support. This recipes is compatible with basic kernel support of meta-seco-bsp.

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@73823020

[WKS][ADD] Add generic wks file compatible with all SOCs

This wks file is compatible with all RK SOCs and depends on some variables (already included in seco-base-rk.inc file). Mainly, the variable has to be present is:

WKS_MACHINE_BOOT_PARTITION_LAYOUT

This is the Clea OS variable set that allows to have an unique WKS file for all SOCs where the bootloader partitions are different among the various SOCs.

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@29c0b086

[MACHINE][ADD] Add Rockchip SOCs support

Include SOCs:

PX30
RK3399
RK356x
RK3588

Including tree: [px30.inc | rk3399.inc | rk356x.inc | rk3588.inc] --> mali.inc --> rockchip-arm64-common.inc --> rockchip-common.inc --> seco-base-rk.inc

seco-base-rk.inc contains all Clea OS settings about the BSP support and all staf regarding these SOCs (e.g. WKS configuration).

Sources of this material:

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Commit: clea-os/layers/seco/meta-seco-rk@8d82c13f

[STRUCTURE][LAYER][ADD] Create mata-layer with basic content

Licence file LICENSE.txt
Documentation file README.md docs/assets/clea_os_logo.png
layer configuration conf/layer.conf conf/bblayers.conf

Note: conf/bblayers.conf file is not yet useful becouse used by internal tool for the Clea OS project configuration. This file will contains the list of layer to include because they are in support of the same (as depencency list). Is currently the layer itself.

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Integrate meta-seco-rk/scarthgap_kickoff

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Update seco-base-rk.inc

Update rk-binary.bb

Reference commit: clea-os/layers/seco/meta-seco-bsp@2e97d430 Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Signed-off-by: Davide Cardillo davide.cardillo@seco.com

Model: Rockchip RK3568 SECO Board (E09) switch to partitions #0, OK mmc1 is current device I2c3 speed: 100000Hz Seco Eeprom Manager - version not compatible or eeprom not formatted Version = 255.255

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