Integrate u-boot-seco-imx/seco_lf_v2021.04_develop_myon2-imx8mm-hdmi-new

Commit: clea-os/bsp/nxp/u-boot-seco-imx@abaa0e1f

[IMX8MM][MYON2][DEFCONFIG] enable video

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@0bbf1f9f

[IMX8MM][MYON2][DTS] Add -u-boot.dtsi files

These files are copied from evk boards.

Here, the important part for video is removing the parent clocks for "lcdif" and "mipi_dsi".

/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;

Otherwise, U-Boot will fail to reparent clocks.

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@fe24f848

[IMX8MM][MYON2][DTS] Activate lcdif, mipi dsi and mipi2hdmi bridge

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@a4f0c536

[IMX8MM][MYON2] enable the dispmix & mipi phy power domain

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@67edf55b

[IMX8MM][MYON2] Update video in board config header

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@a6b0fd27

[IMX8MM] clock: revert VIDEO_PLL_RATE for IMX8MM

In commit 3c60a494786 ([i.MX8MP][DRIVER] configure display clk tree, 2024-07-23) the VIDEO_PLL_RATE was adjusted for IMX8MP. Use #ifdef to select the correct value for IMX8MM.

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@71a345e6

[IMX8MM][MYON2][VIDEO] adv7535: fix init sequence

There is a problem with the default NXP driver for ADV7535 on the Myon2 iMX8MM board (no HDMI signal on a display). But HDMI works well with the init sequence from the uboot-imx-kuk https://git.seco.com/seco-ne/3rd-party/kuk/uboot-imx-kuk/-/blob/d795323705d15c6e9be8326af80d441d10fdc3e9/board/keithkoep/trizeps8mini/display.c#L227

After bisecting the changes, it turns out that only value for one register should be adjusted, to make HDMI work again.

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@b03d48e9

[IMX8MM][MYON2] Fix build warnings

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Commit: clea-os/bsp/nxp/u-boot-seco-imx@994f7d1f

[IMX8MM][MYON2] Remove unused ssc_state_video_pll()

It was removed in commit 778ca51acc4 [IMX8MM][MYON2] Remove Trizeps related stuff